Image processing business

Features of KSJ image processing solution

High-performance SoC Xilinx Zynq UltraScale + MPSoC (3EG) equipped in UZ100 board.

■　Customization

Users can design the hybrid image processing system by using both of Xilinx FPGA vitis library and OpenCV library on Linux.

■　Cooperation

Inside a single chip, image processing can cooperate very fast with ROS system, EtherCAT system and etc.
ROS EtherCAT image-processing

Image processing SDK for Ultrascale+MPSoC Zynq

Block Diagram

画像処理 SDK FPGA OpenCV

Evaluation board UZ100 (Size: 250 × 200 mm)

UZ100 画像処理 interface SDK FPGA OpenCV

  • [Interface for images inputs/outputs]
画像処理 interface SDK FPGA OpenCV
  • [KSJ camera can be provided (CMOS sensor with grobal shutter)]
画像処理 interface SDK FPGA OpenCV

Image processing library list

Software image processing library List (Linux OpenCV)

画像処理 openCV library petalinux linux

FPGA Image Processing Library List (Xilinx Vitis)

  • Refer to the Vitis Vision Library User Guide for detailed information such as FPGA resources and operable frequencies of LUT, DSP, FF, BRAM required for each function.
画像処理 FPGA vitiz library FreeRTOS
画像処理 FPGA vitiz library FreeRTOS
画像処理 FPGA vitiz library FreeRTOS
画像処理 FPGA vitiz library FreeRTOS

3D image processing system using FPGA
~ Structured lighting and phase shift method ~

Verification demo body

3D 画像処理 FPGA vitiz library FreeRTOS

Phase shift algorithm

3D 画像処理 FPGA vitiz library FreeRTOS

3D image processing result

3D 画像処理 FPGA vitiz library FreeRTOS

　　　　　　・ It is possible to acquire 3D images in a dynamic environment!
　　　　　　・Effective for use in production lines and distribution lines!